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Edge termination is the enabling building block of power devices to exploit the high breakdown field of wide bandgap (WBG) and ultra-wide bandgap (UWBG) semiconductors. This work presents a heterogeneous junction termination extension (JTE) based on p-type nickel oxide (NiO) for gallium oxide (Ga2O3) devices. Distinct from prior JTEs usually made by implantation or etch, this NiO JTE is deposited on the surface of Ga2O3 by magnetron sputtering. The JTE consists of multiple NiO layers with various lengths to allow for a graded decrease in effective charge density away from the device active region. Moreover, this surface JTE has broad design window and process latitude, and its efficiency is drift-layer agnostic. The physics of this NiO JTE is validated by experimental applications into NiO/Ga2O3 p–n diodes fabricated on two Ga2O3 wafers with different doping concentrations. The JTE enables a breakdown voltage over 3.2 kV and a consistent parallel-plate junction field of 4.2 MV/cm in both devices, rendering a power figure of merit of 2.5–2.7 GW/cm2. These results show the great promise of the deposited JTE as a flexible, near ideal edge termination for WBG and UWBG devices, particularly those lacking high-quality homojunctions. 

Power semiconductor devices are fundamental drivers for advances in power electronics, the technology for electric energy conversion. Power devices based on wide-bandgap (WBG) and ultra-wide bandgap (UWBG) semiconductors allow for a smaller chip size, lower loss and higher frequency compared with their silicon (Si) counterparts, thus enabling a higher system efficiency and smaller form factor. Amongst the challenges for the development and deployment of WBG and UWBG devices is the efficient dissipation of heat, an unavoidable by-product of the higher power density. To mitigate the performance limitations and reliability issues caused by self-heating, thermal management is required at both device and package levels. Packaging in particular is a crucial milestone for the development of any power device technology; WBG and UWBG devices have both reached this milestone recently. This paper provides a timely review of the thermal management of WBG and UWBG power devices with an emphasis on packaged devices. Additionally, emerging UWBG devices hold good promise for high-temperature applications due to their low intrinsic carrier density and increased dopant ionization at elevated temperatures. The fulfillment of this promise in system applications, in conjunction with overcoming the thermal limitations of some UWBG materials, requires new thermal management and packaging technologies. To this end, we provide perspectives on the relevant challenges, potential solutions and research opportunities, highlighting the pressing needs for device–package electrothermal co-design and high-temperature packages that can withstand the high electric fields expected in UWBG devices.

 

We report the first experimental demonstration of a vertical superjunction device in GaN. P-type nickel oxide (NiO) is sputtered conformally in 6μm deep n-GaN trenches. Sputter recipe is tuned to enable 1017 cm −3 level acceptor concentration in NiO, easing its charge balance with the 9×1016 cm −3 doped n-GaN. Vertical GaN superjunction p-n diodes (SJ-PNDs) are fabricated on both native GaN and low-cost sapphire substrates. GaN SJ-PNDs on GaN and sapphire both show a breakdown voltage (BV) of 1100 V, being at least 900 V higher than their 1-D PND counterparts. The differential specific on-resistance (RON,SP) of the two SJ-PNDs are both 0.3mΩ⋅ cm 2 , with the drift region resistance (RDR,SP) extracted to be 0.15mΩ⋅ cm 2 . The RON,SP∼BV trade-off is among the best in GaN-on-GaN diodes and sets a new record for vertical GaN devices on foreign substrates. The RDR,SP∼BV trade-off exceeds the 1-D GaN limit, fulfilling the superjunction functionality in GaN.